Freescale Semiconductor StarCore SC140 - Manual (Page 325)

DSP Core Instruction Set
SC140 DSP Core Reference Manual A-11
Hh: High register expansion encoding for AGU execution unit 0. This includes all AGU and BMU
instructions. R0-7 registers are expanded up to R0-15.
The two bits Hh controls the expansion of R0-R7 registers to R8-R15 registers in one or two
AGU instruction’s operands according to the following rules:
The H bit is used for all of the operands from the types:
- Rn operand defined with RRR field (e.g. Rn in MOVE like instruction, or ADDA
instructions, EA or ea in MOVE like instructions).
- Rx operand defined with RRRR field.
- Df operand defined with hhh field of MOVE.L Df,C4 and MOVE.L C4.Df instructions.
The h bit is used for all the operands other then the above.
The expansion encoding have no effect if the register decoded in the instruction is not R0-R7
(e.g. SP in RRRR field for Rx decoding).
Fields representing multiple registers (used in some MOVE-like instructns) are affected
together. For example, the register pair encoding for D0:D1 can be expanded to D8:D9 (not
each register independently).
Note that Rr register in (Rn+Rr) addressing mode, is limited to R0-R7 and thus not effected by
both H and h bits.
Tt: The same as Hh, but for AGU execution unit 1.
Note the special position of the T bit (bit 8 in the second word).