Duplicate register destinations -10, Duplicate sr/emr register destinations -10, Duplicate status bit destinations -10 – Freescale Semiconductor StarCore SC140 User Manual

Page 260: Dual stack pointer destination exception -10, Rule g.g.4 exceptions

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7-10

SC140 DSP Core Reference Manual

Static Programming Rules

Example 7-8 Duplicate Register Destinations

move.w #$1234,d0.h

move.w #$5678,d0.l

;not allowed

bmset #3,sr.h

bmset #4,sr.l

;not allowed

Note that

BMSET #$3,SR.H

reads and writes the 32-bit SR register.

MOVE-like instructions that write the SR or EMR register cannot be grouped in a VLES with
instructions that affect individual status bits in the same register.

Example 7-9 Duplicate SR/EMR Register Destinations

pop sr

add d0,d1,d2

;not allowed - C bit is written twice

ift pop sr

iff add d0,d1,d2

;allowed

pop sr

bmtstc #$3,d0.l

;not allowed - T bit is written twice

add d0,d1,d2 bmset #$0040,emr.l

;not allowed - DOVF is written twice

add d0,d1,d2 bmset #$0040,emr.h

;not allowed - DOVF is written twice

Note that

BMSET #$3,SR.H

reads and writes the 32-bit SR register, while

BMTSTC #$3,D0.L

affects only the T status bit in SR.

Multiple instructions that affect the same status bit (T, VF0-3, DI, LF0-3, or SLF bits in SR) cannot
be grouped in a VLES.

Example 7-10 Duplicate Status Bit Destinations

cmpeq d0,d1

tstgea.l r0

;not allowed - multiple T bit updates

cmpeq d0,d1

bmtstc #$3,d0.l

;not allowed - multiple T bit updates

Note that

BMSET #$3,SR.H

reads and writes the 32-bit SR register, while

BMTSTC #$3,D0.L

affects only the T status bit in SR.

Rule G.G.4 also applies to core vs. ISAP instructions in addition to ISAP vs. ISAP instructions. For
the latter case, the ISAP assembler is responsible for detecting the violation.

Rule G.G.4 Exceptions

Two push or pop instructions that both implicitly write the SP register can be grouped in a VLES if
they access different, De (even) and Do (odd), register fields. For the following groupings, the
SC140 ensures that the SP register is written correctly. This case applies to the whole VLES.

Example 7-11 Dual Stack Pointer Destination Exception

push

De field

push

Do field

;allowed

pushn

De field

pushn

Do field

;allowed

pop

De field

pop

Do field

;allowed

popn

De field

popn

Do field

;allowed

ift push De field

ifa push Do field

;allowed

Two mutually exclusive writes to the same register (except the PC register) can be grouped in a
VLES.

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