Freescale Semiconductor StarCore SC140 - Manual (Page 343)

ADDA
SC140 DSP Core Reference Manual A-29
ADDA
Add (AGU)
ADDA
Description
These operations add an immediate signed 16-bit integer to the contents of a source AGU register and store
the result in a destination address register. If the second source operand (rx) uses R0-R7, the operation is
affected by the modifier mode selected in the modifier control register (MCTL).
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
None.
Operation Assembler Syntax
#u5 + Rx
→ Rx
ADDA #u5,Rx {0
≤ u5 < 32}
#s16 + rx
→ Rn
ADDA #s16,rx,Rn {–2
15 ≤ s16 < 2 15
}
rx + Rx
→ Rx
ADDA rx,Rx
ADDA #u5,Rx
Adds an immediate unsigned 5-bit integer to a source AGU register, Rx, (address or offset register,
program counter, or active stack pointer) and stores the result in the destination register (Rx). The five bits
of the unsigned integer are right-aligned and the upper bits are zero-extended to form a 32-bit source
operand. For R0-R7, the operation is affected by the modifier mode selected in MCTL. If the stack pointer
is the destination operand, then the immediate value must be a multiple of eight as its three LSBs are forced
to zero.
ADDA #s16,rx,Rn
Adds an immediate signed 16-bit integer and the contents of a source AGU register (rx) and stores the
result in a destination address register (Rn). The 16 bits of the signed integer are right-aligned and the
upper bits are sign-extended to form a 32-bit operand. If the second source operand (rx) uses R0-R7, the
operation is affected by the modifier mode selected in MCTL.
ADDA rx,Rx
Adds the contents of two source AGU registers (rx, Rx) and stores the result in the destination (second
source) register (Rx). If the second source operand (Rx) uses R0-R7, the operation is affected by the
modifier mode selected in MCTL. If the stack pointer is the destination operand, then the value in rx must
be a multiple of eight as its three LSBs are forced to zero.
Register Address Bit Name Description
SR[18] EXP Determines which stack pointer is used when the stack pointer is an
operand. Otherwise, the instruction is not affected by SR.
MCTL[31:0] AM3–AM0 Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.