Freescale Semiconductor StarCore SC140 - Manual (Page 73)

Address Generation Unit
SC140 DSP Core Reference Manual 2-41
2.3.3.4 Special Addressing Modes
The special addressing modes do not use an address register when specifying an effective address. They
either use an immediate value that is included in the instruction for the data value, such as the data value
address, or they use a register that is implicitly referenced by the instruction for the data value.
• Immediate Short Data — A 5-bit, 6-bit, or 7-bit operand is part of the instruction operation word.
The 5-bit zero-extended operand is used for DALU and AGU arithmetic instructions. The 6-bit
zero-extended operand is used for DALU instructions to move short immediate data to an LCn
register. The 7-bit sign-extended operand is used for immediate moves to a register. This reference
is classified as a program reference. An example is:
doen2 #$3f . The value $3f, 63, is loaded to
loop counter 2.
• Immediate Word Data — This addressing mode requires a one-word instruction extension. The
immediate data is a 16-bit operand. This reference is classified as a program reference. An example
is:
doen2 #$40 . The value 64 is loaded to loop counter 2. The value exceeds the 6-bit limit for
immediate short data, so an extra word is needed for the encoding.
• Immediate Long Data — This addressing mode requires a two-word instruction extension. The
immediate data is a 32-bit operand. This reference is classified as a program reference. An example
is: move.l
#$f00d0d01,n0 . The 32-bit unsigned value is moved to the general register n0.
• Absolute Word Address — This addressing mode requires a one-word instruction extension. The
operand address occupies 16 bits in the instruction operation words, and is zero-extended to form a
32-bit address. This reference is classified as a memory reference. An example is:
move.w
($8a20),d0 .
• Absolute Long Address — This addressing mode requires a two-word instruction extension. A
32-bit address is contained in the instruction words. This reference is classified as a memory
reference. An example is:
move.w ($34008a20),d0 .
• Absolute Jump Address — The operand occupies 32 bits in the instruction operation words. It
requires a two-word instruction extension. This reference is classified as a program reference. An
example is:
jmp lbl4 , where the instruction is encoded with the program memory address of lbl4.
• Implicit Reference — Some instructions make implicit reference to the PC, normal or exception
stack, loop registers (SA0, SA1, SA2, SA3, LC0, LC1, LC2, LC3), or status register (SR). These
registers are implied by the instruction, and their use is defined by the individual instruction
descriptions. An example is:
tfra osp,r2 , which transfers the 32-bit word stored at the other
(non-active) stack pointer to address register R2.