Moves.2f, Move two fractional words to, Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual
Page 611
MOVES.2F
SC140 DSP Core Reference Manual
A-297
MOVES.2F
Move Two Fractional Words to
MOVES.2F
Memory With Scaling and
Saturation (AGU)
Description
The data that is moved from each register to memory is scaled according to the scaling mode. If the Ln bit
is set, the moved data is also saturated. The address register values must be long aligned. This instruction is
affected by by SM (Saturation Mode bit - SR[2]). When SM is set, scaling is not performed, and the scale
bits S[1:10] have no effect.
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
moves.2f d0:d1,(r0)
Operation
Assembler Syntax
Da:Db
→ (EA)
MOVES.2F Da:Db,(EA)
MOVES.2F Da:Db,(EA)
Moves two signed fractional words from a data register pair to a memory address pointed to by an address
register with an optional offset or post-increment.
The first operand (Da) will be moved to the lower memory address (EA). The second operand (Db) will be
moved to memory address (EA + 2). In order to keep this behavior in both big endian and little endian
modes, the core will interpret the data bus differently in each mode. See
on page 2-56, for more detail on bus and memory behavior for each mode.
Register Address
Bit Name
Description
MCTL[31:0]
AM3–AM0
Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
SR[5:4]
S[1:0]
Scaling mode bits choose: no scaling, scale up one bit, or scale down
one bit.
Ln
L
Limited values are written to the destination if the Ln bit is set.
EMR[16]
BEM
Set if big endian mode, cleared if little endian mode.
Register Address
Bit Name
Description
SR[6]
S
Scaling bit, set when the absolute value of either or both of the
words moved (after scaling and limiting) is greater than or equal to
0.25 and less than 0.75.
Register/Memory Address
Before
After
MCTL
$0000 0000