Freescale Semiconductor StarCore SC140 User Manual
Page 594
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SC140 DSP Core Reference Manual
MOVE.L
MOVE.L (a32),DR
MOVE.L DR,(a32)
Moves a 32-bit long word between a data or address register and a memory address pointed to by a 32-bit
absolute address.
MOVE.L (a16),C4
MOVE.L C4,(a16)
Moves a 32-bit long word between a general register and a memory address pointed to by a 16-bit
unsigned absolute address.
MOVE.L (Rn+u3),DR
MOVE.L DR,(Rn+u3)
Moves a 32-bit long word between a data or address register and a memory address pointed to by an
address register plus a 3-bit unsigned offset that is preshifted right by 2 bits. The offset u3, defined by the
programmer, must be a multiple of four from 0:28. It is encoded by the assembler with 3 bits,
thus
creating a 3-bit offset, which is coded in the instruction. The core, when decoding the instruction,
post shifts left the 3-bit offset to reconstruct the real offset. This feature enables condensed code
size when short immediates are needed.
MOVE.L (Rn+s15),DR
MOVE.L DR,(Rn+s15)
Moves a 32-bit long word between a data or address register and a memory address pointed to by an
address register plus a 15-bit signed offset.
MOVE.L (Rn+Rr),DR
MOVE.L DR,(Rn+Rr)
Moves a 32-bit long word between a data or address register and a memory address pointed to by an
address register plus the contents of a second address register as an offset. The second address register (Rr)
is shifted left by 2 bits prior to being added. The modifier mode of this instruction is determined by Rn in
MCTL. Rr is limited to R0–R7.
MOVE.L (EA),DR
MOVE.L DR,(EA)
Moves a 32-bit long word between a data or address register and a memory address pointed to by an
address register with optional offset or post-increment.
MOVE.L (Rn),C3
MOVE.L C3,(Rn)
Moves a 32-bit long word between a control, offset, or modifier register and a memory address pointed to
by an address register.
MOVE.L (SP–u6),DR
MOVE.L DR,(SP–u6)
Moves a 32-bit long word between a data or address register and a memory address pointed to by the active
stack pointer minus a 6-bit unsigned offset.