Freescale Semiconductor StarCore SC140 - Manual (Page 48)

2-16 SC140 DSP Core Reference Manual
DALU
Note that in the unusual case where arithmetic saturation mode is set between a DALU instruction and a
subsequent moves instruction, scaling with the moves instruction is inhibited. However, limiting will occur
if the Ln bit is already set.
2.2.1.7 Scaling and Arithmetic Saturation Mode Interactions
The following table shows the scaling and limiting operations for the four possible cases of scaling/no
scaling with arithmetic saturation mode on/off. Note that the mode of both scaling and arithmetic
saturation selected is not a normal mode of operation for the core. The “Special Six” instructions referred
to in Table 2-10 and Table 2-11 are ADC, DIV, SBC, TFR, TFRT, and TFTF.
Note: Limiting will occur if the Ln bit is set.
Table 2-9. Limiting Example
Instruction
Memory/
Register
New Value Comments
move.w #$0030,r0 r0 $0000 0020 R0 holds the address for the first move to memory
moveu.w #$7fff,d0.h d0 $7fff 0000 d0.h set with the most positive 2’s complement number
moveu.w #$7fff,d1.h d1 $7fff 0000 d1.h set with the most positive 2’s complement number
add d0,d1,d3 d3 $1:00:fffe 0000 L3 bit set from overflow
move.f d3,(r0)+ $0020 $fffe No limiting from the move instruction
moves.f d3,(r0) $0022 $7fff Limiting occurs with the moves instruction
Table 2-10. Scaling and Limiting Interactions
Scaling
Selected
Arithmetic
Saturation
Mode
Ln Bit Calculation
Limiting
with MOVES
instructions
(see note below)
Scaling with
MOVES
Instructions
Saturable
DALU
Instructions
Special Six
Instructions
Other DALU
Instructions
None Off Calculated,
no scaling
Calculated,
no scaling
Cleared Yes No
Up/down Off Calculated,
with scaling
Calculated,
with scaling
Cleared Yes Yes
Off On Cleared Calculated,
no scaling
Cleared Yes No
Up/down On Cleared Calculated,
no scaling
Cleared Yes No