1 baud rate generator, 2 cs to sck delay (tcsc), 3 after dspisck delay (tasc) – Freescale Semiconductor MCF5480 User Manual

Page 841: 4 delay after transfer (tdt), Baud rate generator -23, Cs to sck delay (tcsc), After dspisck delay (tasc), Delay after transfer (t, Section 27.7.3.2, “cs to sck delay (tcsc), Section 27.7.3.3, “after dspisck delay (tasc)

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Functional Description

MCF548x Reference Manual, Rev. 3

Freescale Semiconductor

27-23

27.7.3.1

Baud Rate Generator

The baud rate is the frequency of the DSPI serial communication clock (DSPISCK). The system clock f

sys

is divided by a prescaler (PBR) and scaler (BR) to produce DSPISCK. The PBR and BR fields in the

DCTARn registers select the frequency of DSPISCK by the formula below:

Table 27-15

shows an example of how to compute the baud rate.

27.7.3.2

CS to SCK Delay (t

CSC

)

The CS to SCK delay is the length of time from assertion of the DSPICSn signal to the first DSPISCK

edge. See

Figure 27-17

for an illustration of the CS to SCK delay. The PCSSCK and CSSCK fields in the

DCTARn registers select the CS to SCK delay by the formula below:

Eqn. 27-5

Table 27-16

shows an example of how to compute the CS to SCK delay.

27.7.3.3

After DSPISCK Delay (t

ASC

)

The after DSPISCK delay is the length of time between the last edge of DSPISCK and the negation of

DSPICSn. See

Figure 27-15

and

Figure 27-16

for illustrations of the after DSPISCK delay. The PASC and

ASC fields in the DCTARn registers select the after DSPISCK delay by the formula below:

Eqn. 27-6

Table 27-17

shows an example of how to compute the after DSPISCK delay.

27.7.3.4

Delay after Transfer (t

DT

)

The delay after transfer is the length of time between negation of the DSPICSn signal for a frame and the

assertion of the DSPICSn signal for the next frame. See

Figure 27-15

for an illustration of the delay after

transfer. The PDT and DT fields in the DCTARn registers select the delay after transfer by the formula

below:

Table 27-15. Baud Rate Computation Example

PBR

Prescaler

BR

Scaler

Fsys

Baud Rate

0b00

2

0b0000

2

100 MHz

25 Mb/s

Table 27-16. PCS to DSPISCK Delay Computation Example

PCSSCK

Prescaler

CSSCK

Scaler

Fsys

PCS to DSPISCK

Delay

0b01

3

0b0100

32

100 MHz

0.96 us

Table 27-17. After DSPISCK Delay Computation Example

PASC

Prescaler

ASC

Scaler

Fsys

After DSPISCK Delay

0b01

3

0b0100

32

100 MHz

0.96 us

DSPISCK baud rate

=

PBR

× BR

f

sys

t

CSC

1

f

sys

--------

PCSSCK CSSCK

Ч

Ч

=

t

ASC

1

f

sys

--------

PASC

×

ASC

Ч

=

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