Current loop receiver, Figure 6.72 – process loop receiver block diagram – Rockwell Automation 7000L PowerFlex Medium Voltage AC Drive (C Frame) - Classic Control User Manual
Page 438
Advertising
6-94
Component Definition and Maintenance
7000L-UM300I-EN-P – June 2013
7000 “C” Frame
CIB
J4A
Process Loop Receiver
Shielded Twisted Pair
SHLD
1
2
3
4
Ia
CIB
J4A
Process Loop Receiver
Shielded Twisted Pair
SHLD
1
2
3
4
Ia
Figure 6.71 – Recommended Connection to CIB Transmitter
Current Loop Receiver
The receiver can accept either 0-20mA or 4-20mA inputs from an
external transmitter. The transmitter must have a minimum loop
compliance of 5V to satisfy the input impedance of 250 ohms.
A block diagram of the receiver is shown below.
DSP
FPGA
Isolated
DC/DC
Converter
A/D
Isolation
Amplifier
250R
3
4
1
2
+15V @ 2W
Buffer
J4B
x
1
u
1
DSP
FPGA
Isolated
DC/DC
Converter
A/D
Isolation
Amplifier
250R
3
4
1
2
+15V @ 2W
Buffer
J4B
x
1
u
1
Figure 6.72 – Process Loop Receiver Block Diagram
Advertising