5 commands, 6 interrupt request register (al event register), 7 write access – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual

Page 112: 8 read access, Commands, Interrupt request register (al event register), Write access, Read access, Table 49: spi commands cmd0 and cmd1, Table 50: interrupt request register transmission

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5 commands, 6 interrupt request register (al event register), 7 write access | 8 read access, Commands, Interrupt request register (al event register), Write access, Read access, Table 49: spi commands cmd0 and cmd1, Table 50: interrupt request register transmission | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual | Page 112 / 144 5 commands, 6 interrupt request register (al event register), 7 write access | 8 read access, Commands, Interrupt request register (al event register), Write access, Read access, Table 49: spi commands cmd0 and cmd1, Table 50: interrupt request register transmission | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual | Page 112 / 144
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