BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k - Manual (Page 40)

IP Core Usage
III-28 Slave Controller – IP Core for Xilinx FPGAs
4 IP Core Usage
4.1 IPCore_Config Tool
This chapter explains how to configure your own EtherCAT IP Core using the IPCore_Config tool. The
IPCore_Config tool is used for configuration of the EtherCAT IP Core. The output of the tool is a VHDL
wrapper for the EtherCAT IP Core library file. The wrapper file makes only those interfaces visible
which were selected by the user, and it configures the EtherCAT IP Core using generics as desired.
The EtherCAT IP Core library file contains the encrypted source code with the EtherCAT functionality.
A synthesizable EtherCAT IP Core consists of the user generated VHDL wrapper, the EtherCAT IP
Core library file, and the vendor ID package (pk_ECAT_VENDORID.vhd). These files, together with a
DCM or PLL, represent the minimum source set for a fully functional EtherCAT slave. Typically,
additional user logic is added inside the FPGA.
1. Configure your IP Core with IPCore_Config.exe
Start IPCore_Config.exe located in the directory <IPInst_dir>\IPCore_Config
On Linux PCs, Start the IP Core configuration tool using mono:
# mono IPCore_Config.exe
2. Enter a design name and folder, or browse for a folder and enter the new design name in the file
dialog.
3. Press "Continue"
Figure 5: IPCore_Config Open Menu
4. Configure the EtherCAT IP Core. See chapter 5 for configuration options.
5. Generate IP Core by pressing the Generate button if configuration is complete
Figure 6: IP Core generation successful
The tool will generate three files (unless PLB or AXI PDI are configured):
- The VHDL wrapper for the user configured IP core (<design name>.vhd)
a
b