Altera RapidIO II MegaCore Function - Manual (Page 168)

6–30 Chapter 6: Software Interface
Transport and Logical Layer Registers
RapidIO II MegaCore Function August 2014 Altera Corporation
User Guide
Implementation
Defined
[1:0] RO Reserved for this implementation 2'b00
Notes to Table 6–28 :
(1) If one of the Logical layers supported by the RapidIO II IP core is not selected in the RapidIO II parameter editor, the corresponding bits in the
Source Operations CARs are set to zero by default.
(2) The reset value of the Source Operations CAR is the result of the bitwise exclusive-or operation applied to the default values and the value
you specify for Source operations CAR override in the RapidIO II parameter editor.
(3) The default value is 1'b1 if you turn on Enable I/O Logical layer Slave module in the RapidIO II parameter editor. The default value is 1'b0 if
you turn off Enable I/O Logical layer Slave module in the RapidIO II parameter editor.
(4) Thedefault value is 1'b1 if you turn on Enable Doorbell support in the RapidIO II parameter editor. The default value is 1'b0 if you turn off
Enable Doorbell support in the RapidIO II parameter editor.
(5) The default value is 1'b1 if you turn on Enable Maintenance module in the RapidIO II parameter editor. The default value is 1'b0 If you turn
off Enable Maintenance module.
Table 6–28. Source Operations CAR—Offset: 0x18 (1) , (2) (Part 2 of 2)
Field Bits Access Function Default
Table 6–29. Destination Operations CAR—Offset: 0x1C (1) , (2) (Part 1 of 2)
Field Bits Access Comment Default
RSRV [31:20] RO Reserved 12'h0
DATA_STRM_TRAFFIC
_MANAGEMENT
[19] RO
Processing element can support data streaming traffic
management
1'b0
DATA_STREAMING [18] RO Processing element can support a data streaming operation 1'b0
RSRV [17:16] RO Reserved 2'b0
READ [15] RO Processing element can support a read operation (3)
WRITE [14] RO Processing element can support a write operation (3)
SWRITE [13] RO Processing element can support a streaming-write operation (3)
NWRITE_R [12] RO Processing element can support a write-with-response operation (3)
Data Message [11] RO Processing element can support data message operation 1'b0
DOORBELL [10] RO Processing element can support a DOORBELL operation (4)
ATM_COMP_SWP [9] RO
Processing element can support an ATOMIC compare-and-swap
operation
1'b0
ATM_TEST_SWP [8] RO
Processing element can support an ATOMIC test-and-swap
operation
1'b0
ATM_INC [7] RO Processing element can support an ATOMIC increment operation 1'b0
ATM_DEC [6] RO
Processing element can support an ATOMIC decrement
operation
1'b0
ATM_SET [5] RO Processing element can support an ATOMIC set operation 1'b0
ATM_CLEAR [4] RO Processing element can support an ATOMIC clear operation 1'b0
ATM_SWAP [3] RO Processing element can support an ATOMIC swap operation 1'b0
PORT_WRITE [2] RO Processing element can support a port-write operation (5)