Altera RapidIO II MegaCore Function - Manual (Page 23)

Chapter 2: Getting Started 2–5
Simulating IP Cores
August 2014 Altera Corporation RapidIO II MegaCore Function
User Guide
You can use the functional simulation model and the testbench or example design
generated with your IP core for simulation. The functional simulation model and
testbench files are generated in a project subdirectory. This directory may also include
scripts to compile and run the testbench. For a complete list of models or libraries
required to simulate your IP core, refer to the scripts generated with the testbench.
You can use the Quartus II NativeLink feature to automatically generate simulation
files and scripts. NativeLink launches your preferred simulator from within the
Quartus II software.
For more information about simulating Altera IP cores, refer to Simulating Altera
Designs in volume 3 of the Quartus II Handbook.
Simulating the Testbench with the ModelSim Simulator
To simulate the RapidIO II IP core testbench using the Mentor Graphics ModelSim
simulator, perform the following steps:
1. Start the ModelSim simulator.
2. In ModelSim, change directory to the directory where the testbench simulation
script is located:
■ For Arria 10 variations, change directory to <variation>/sim/mentor.
■ For all other variations you generate from the Quartus II IP Catalog, change
directory to <variation>_sim/mentor.
■ For all other variations you generate from the Qsys IP Catalog, change
directory to <Qsys system>/simulation/mentor.
3. To set up the required libraries, compile the generated simulation model, and
exercise the simulation model with the provided testbench, type one of the
following sets of commands:
a. For non-Arria 10 variations, type the following commands:
do msim_setup.tcl
set TOP_LEVEL_NAME <variation>.tb_rio (
ld
run -all
b. For Arria 10 variations, type the following commands:
do msim_setup.tcl
set TOP_LEVEL_NAME <variation>_altera_rapidio2_140.tb_rio
ld
run -all