Altera RapidIO II MegaCore Function - Manual (Page 37)

Chapter 3: Parameter Settings 3–7
Capability Registers Settings
August 2014 Altera Corporation RapidIO II MegaCore Function
User Guide
Assembly Vendor ID
Assembly Vendor ID uniquely identifies the vendor who manufactured the
assembly. This value corresponds to the AssyVendorIdentity field of the Assembly
Identity
register.
Assembly Information CAR
The Assembly Information CAR options identify the vendor who manufactured the
assembly or subsystem of the device and the pointer to the first entry in the Extended
Features list, and sets these values in the Assembly Information (
Table 6–25 ) CAR.
Revision ID
Revision ID indicates the revision level of the assembly and sets the AssyRev field of
the Assembly Information CAR ( Table 6–25 ). In the Qsys design flow, this parameter
is labeled Assembly revision ID.
Processing Element Features CAR
The Processing Element Features CAR ( Table 6–26 on page 6–27 ) identifies the
major features of the processing element.
Bridge Support
Bridge support , when turned on, sets the Bridge bit in the Processing Element
Features CAR and indicates that this processing element can bridge to another
interface such as PCI Express, a proprietary processor bus such as Avalon-MM,
DRAM, or other interface.
Memory Access
Memory access , when turned on, sets the Memory bit in the Processing Element
Features CAR and indicates that the processing element has physically addressable
local address space that can be accessed as an endpoint through non-maintenance
operations. This local address space may be limited to local configuration registers, or
can be on-chip SRAM, or another memory device.
Processor Present
Processor present , when turned on, sets the Processor bit in the Processing Element
Features CAR and indicates that the processing element physically contains a local
processor such as the Nios ® II embedded processor or similar device that executes
code. A device that bridges to an interface that connects to a processor should set the
Bridge
bit—as described in “Bridge Support” —instead of the Processor bit.
Enable Flow Arbitration Support
Enable flow arbitration support , when turned on, sets the Flow Arbitration
Support bit in the Processing Element Features CAR and indicates that the
processing element supports flow arbitration. The IP core routes Type 7 packets to the
Avalon-ST pass-through interface, so user logic must implement flow control on the
Avalon-ST pass-through interface.