Altera RapidIO II MegaCore Function - Manual (Page 98)

4–56 Chapter 4: Functional Description
Logical Layer Interfaces
RapidIO II MegaCore Function August 2014 Altera Corporation
User Guide
Pass-Through Interface Usage Examples
This section contains examples of communication on the RapidIO II IP core Avalon-ST
pass-through interface. Refer to
“Transaction ID Ranges” on page 4–48 and
“Receiver” on page 4–71 for a description of the RapidIO II IP core variations in which
these examples are processed through the Avalon-ST pass-through interface rather
than being processed through one of the I/O Logical layer modules.
Table 4–31 lists the examples.
10
ttype[3:0] [63:60]
status[3:0] [59:56]
transactionID[7:0] [55:48]
info_msb[7:0] [47:40]
info_lsb[7:0] [39:32]
crc[15:0] [31:16]
Reserved[15:0] [15:0]
11
msglen[3:0] [63:60]
ssize[3:0] [59:56]
letter[1:0] [55:54]
mbox[1:0] [53:52]
msgseg[3:0] or xmbox[3:0] [51:48]
Reserved[47:0] [47:0]
13
ttype[3:0] [63:60]
status[3:0] [59:56]
transactionID[7:0] or target_info[7:0] [55:48]
Reserved[47:0] [47:0]
Table 4–30. specific_header Fields in gen_rx_hd_data Bus (Part 2 of 2)
ftype Field specific_header Bits
Table 4–31. Avalon-ST Pass-Through Interface Usage Examples
User Operation
Operation
Type
RapidIO Transaction Priority
Device ID
Width
Payload Size
(Bytes)
Send write request TX NWRITE 0 8 40
Receive write request RX NWRITE 0 8 40
Send read request Tx NREAD 1 16 32
Receive read response Rx Response with payload 2 16 32
Receive read request Rx NREAD 1 16 32
Send read response Tx Response with payload 2 16 32
Send streaming write request Tx SWRITE 3 8 40
Receive streaming write request Rx SWRITE 3 8 40