Altera Video and Image Processing Suite User Manual
Page 105
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Note: For the Clocked Video Output IP cores, to ensure the
vid_f
signal rises at the Field 0 blanking
period and falls at the Field 1, use the following equation:
F rising edge line > = Vertical blanking rising edge line
F rising edge line < Vertical blanking rising edge line + (Vertical sync +
Vertical front porch + Vertical back porch)
F falling edge line < active picture line
4-46
Clocked Video Interface Control Registers
UG-VIPSUITE
2015.05.04
Altera Corporation
Clocked Video Interface IP Cores
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