Control synchronizer ip core -1, Deinterlacing ip cores -1, Frame reader ip core -1 – Altera Video and Image Processing Suite User Manual

Page 4: Frame buffer ip cores -1

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Color Space Conversion Parameter Settings..........................................................................................10-4

Color Space Conversion Signals.............................................................................................................. 10-8

Color Space Conversion Control Registers..........................................................................................10-10

Control Synchronizer IP Core.......................................................................... 11-1

Using the Control Synchronizer IP Core............................................................................................... 11-2

Control Synchronizer Parameter Settings..............................................................................................11-4

Control Synchronizer Signals...................................................................................................................11-5

Control Synchronizer Control Registers................................................................................................ 11-6

Deinterlacing IP Cores...................................................................................... 12-1

Deinterlacing Methods..............................................................................................................................12-2

Bob with Scanline Duplication.....................................................................................................12-3

Bob with Scanline Interpolation.................................................................................................. 12-3

Weave.............................................................................................................................................. 12-3

Motion-Adaptive........................................................................................................................... 12-3

Pass-Through Mode for Progressive Frames.............................................................................12-6

Frame Buffering......................................................................................................................................... 12-6

Frame Rate Conversion.............................................................................................................................12-8

Bandwidth Requirement Calculations for 10-bit YCbCr Video......................................................... 12-8

Behavior When Unexpected Fields are Received..................................................................................12-9

Handling of Avalon-ST Video Control Packets..................................................................................12-10

Deinterlacing Parameter Settings..........................................................................................................12-10

Deinterlacing Signals...............................................................................................................................12-17

Deinterlacing Control Registers............................................................................................................ 12-23

Design Guidelines for Broadcast Deinterlacer IP Core......................................................................12-30

Tuning Motion Shift....................................................................................................................12-32

Active Video Threshold Adjustment........................................................................................ 12-32

Frame Reader IP Core....................................................................................... 13-1

Single-Cycle Color Patterns......................................................................................................................13-1

Frame Reader Output Pattern and Memory Organization..................................................................13-2

Frame Reader Parameter Settings............................................................................................................13-3

Frame Reader Signals................................................................................................................................ 13-3

Frame Reader Control Registers..............................................................................................................13-5

Frame Buffer IP Cores.......................................................................................14-1

Double Buffering........................................................................................................................................14-2

Triple Buffering..........................................................................................................................................14-2

Locked Frame Rate Conversion...............................................................................................................14-3

Handling of Avalon-ST Video Control Packets.................................................................................... 14-3

Color Format.............................................................................................................................................. 14-4

Frame Buffer Parameter Settings.............................................................................................................14-5

Frame Buffer Signals..................................................................................................................................14-9

Frame Buffer Control Registers............................................................................................................. 14-13

TOC-4

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