Trace system ip core, Trace system ip core -1 – Altera Video and Image Processing Suite User Manual

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Trace System IP Core

20

2015.05.04

UG-VIPSUITE

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The Trace System IP core is a debugging and monitoring component.
The trace system collects data from various monitors, such as the Avalon-ST monitor, and passes it to

System Console software on the attached debugging host. System Console software captures and

visualizes the behavior of the attached system. You can transfer data to the host over one of the following

connections:
• Direct USB connection with a higher bandwidth; for example On-Board USB-Blaster

II

• If you select the USB connection to the host, the trace system exposes the

usb_if

interface.

• Export this interface from the Qsys system and connect to the pins on the device that connects to

the On-Board USB-Blaster II.
Note: To manually connect the

usb_if

conduit, use the USB Debug Link component, located in

Verification > Debug & Performance.

• JTAG connection

• If you select the JTAG connection to the host, then the Quartus II software automatically makes the

pin connection during synthesis.

The Trace System IP core transports messages describing the captured events from the trace monitor

components, such as the Frame Reader, to a host computer running the System Console software.

Figure 20-1: Trace System Functional Block Diagram

Conduit for connection

to pins (USB only)

Avalon-ST Source

(capture)

Avalon-MM Slave

(control)

Monitor #1

Monitor #2

Altera Trace System

Buffering

Link to Host

When you instantiate the Trace System IP core, turn on the option to select the number of monitors

required. The trace system exposes a set of interfaces:

capturen

and

controln

. You must connect each

pair of the interfaces to the appropriate trace monitor component.

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