Altera Video and Image Processing Suite - Manual (Page 11)

Latency
You can use the latency information to predict the approximate latency between the input and the output
of your video processing pipeline.
The latency is described using one or more of the following measures:
• the number of progressive frames
• the number of interlaced fields
• the number of lines when less than a field of latency
• a small number of cycles
O
(cycles)
Note:
O
refers to a small number of clock cycles, and is not of zero value.
The latency is measured with the assumption that the IP core is not being stalled by other functions on the
data path; (the output ready signal is high).
Table 1-4: Video and Image Processing Suite Latency
The table below lists the approximate latency from the video data input to the video data output for typical usage
modes of the Video and Image Processing Suite IP cores.
IP Core Mode Latency
2D FIR Filter Latency Filter size:
N
×
N
(N–1) lines +
O
(cycles)
Alpha Blending Mixer/ Mixer II All modes
O
(cycles)
Chroma Resampler
Input format: 4:2:2; Output
format: 4:4:4
O
(cycles)
Input format: 4:2:0; Output
format: 4:4:4 or 4:2:2
1 line +
O
(cycles)
Clipper/ Clipper II All modes
O
(cycles)
Clocked Video Input
Note: Add 1 cycle if you turned
on the Allow color planes
in sequence input
parameter.
• Synchronization signals:
Embedded in video
• Video in and out use the
same clock: On
8 cycles
• Synchronization signals: On
separate wires
• Video in and out use the
same clock: On
5 cycles
UG-VIPSUITE
2015.05.04
Latency 1-5
Video and Image Processing Suite Overview Altera Corporation
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