Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 184
Word
Addr
Bit
R/W
Name
Description
0xD2
0
RO
Link Trained -
Receiver status
When set to 1, the receiver is trained and is ready to receive
data. When set to 0, receiver training is in progress. For more
information, refer to the state variable rx_trained as defined
in Clause 72.6.10.3.1 and bit 10GBASE-KR PMD control
register bit 10GBASE_KR PMD status register bit (1.151.0) of
IEEE 802.3ap
-
2007.
1
RO
Link Training
Frame lock
When set to 1, the training frame delineation has been
detected. When set to 0, the training frame delineation has
not been detected. For more information, refer to the state
variable frame_lock as defined in Clause 72.6.10.3.1 and
10GBASE_KR PMD status register bit 10GBASE_KR PMD
status register bit (1.151.1) of IEEE 802.3ap
-
2007.
2
RO
Link Training
Start-up protocol
status
When set to 1, the start-up protocol is in progress. When set
to 0, start-up protocol has completed. For more information,
refer to the state training as defined in Clause 72.6.10.3.1 and
10GBASE_KR PMD status register bit (1.151.2) of IEEE
802.3ap
-
2007.
3
RO
Link Training
failure
When set to 1, a training failure has been detected. When set
to 0, a training failure has not been detected For more
information, refer to the state variable training_failure as
defined in Clause 72.6.10.3.1 and bit 10GBASE_KR PMD
status register bit (1.151.3) of IEEE 802.3ap-2007.
4
RO
Link Training
Error
When set to 1, excessive errors occurred during Link
Training. When set to 0, the BER is acceptable.
5
RO
Link Training
Frame lock Error
When set to 1, indicates a frame lock was lost during Link
Training. If the tap settings specified by the fields of 0xD5 are
the same as the initial parameter value, the frame lock error
was unrecoverable.
6
RO
CTLE Frame Lock
Loss
When set to 1, indicates that fram lock was lost at some point
during CTLE link training.
7
RO
CTLE Tuning Error
When set to 1, indicates that CTLE did not achieve best
results because the BER counter reached the maximum value
for each step of CTLE tuning.
0xD3
9:0
RW
ber_time_frames
Specifies the number of training frames to examine for bit
errors on the link for each step of the equalization settings.
Used only when ber_time_k_frames is 0.The following values
are defined:
• A value of 2 is about 10
3
bytes
• A value of 20 is about 10
4
bytes
• A value of 200 is about 10
5
bytes
The default value for simulation is 2'b11. The default value
for hardware is 0.
UG-01088
2014.12.15
10GBASE-KR PHY Register Definitions
C-11
10GBASE-KR Registers
Altera Corporation