Bus quantization effects with adapters – Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual

Page 57

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Table 3-3: Signals of the TX Client Interface Without Adapters

In the table, <w> = 2 for the 40GbE IP core and <w> = 5 for the 100GbE IP core.

Signal Name

Direction

Description

din[<w>*64-1:0]

Input

Data bytes to send in big-Endian mode.

din_start[<w>-

1:0]

Input

Start of packet (SOP) location in the TX data bus. Only the most

significant byte of each 64-bit word may be a start of packet. Bit 63 or

127 are possible for the 40GbE and bits 319, 255, 191, 127, or 63 are

possible for 100 GbE.

din_end_pos[<w>

*8-1:0]

Input

End of packet. Any byte may be the last byte in a packet.

din_ack

Output

Indicates that input data was accepted by the IP core.

clk_txmac

Input

TX MAC clock. The minimum clock frequency is 315 MHz for the

circuit to function correctly. The

clk_txmac

and

clk_rxmac

which

clocks the RX datapath are not related and their rates do not have to

match.

The IP core reads the bytes in big endian order. A packet may start in the most significant byte of any

word. A packet may end on any byte.
To avoid sending packets before the IP core completes the reset sequence, you should ensure that the

application does not send packets on the TX client interface until after the

lanes_deskewed

signal is

asserted.

Related Information

40GbE IP Core Without Adapters

on page 3-12

Illustrates the 40GbE IP core TX client interface without adapters.

100GbE IP Core Without Adapters

on page 3-14

Illustrates the 100GbE IP core TX client interface without adapters.

Bus Quantization Effects With Adapters

The TX custom streaming interface allows a packet to start at any of two or five positions to maximize

utilization of the link bandwidth. The TX Avalon-ST interface only allows start of packet (SOP) to be

placed at the most significant position. If the SOP were restricted to the most significant position in the

client logic data bus in the custom streaming interface, bus bandwidth would be reduced.

3-10

Bus Quantization Effects With Adapters

UG-01088

2014.12.15

Altera Corporation

Functional Description

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