Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 54
bits). In both cases the client interfaces operate at a frequency above 315 MHz in the standard IP core
variations, and at or above the frequency of 190.90 MHz in 24.24 Gbps variations.
The client acts as a source and the TX MAC acts as a sink in the transmit direction.
Figure 3-3: TX Client to MAC Interface with Adapters (Avalon-ST)
The Avalon-ST interface bus width varies with the IP core variation. In the figure, <n> = 4 for the 40GbE
IP core and <n> = 8 for the 100GbE IP core. <l> is log
2
(8*<n>).
l<n>_tx_data[<n>*64-1:0]
l<n>_tx_empty[<l>-1:0]
l<n>_tx_startofpacket
l<n>_tx_endofpacket
l<n>_tx_ready
l<n>_tx_valid
TX MAC
TX Client
Logic
Table 3-2: Signals of the TX Client Interface with Adapters
In the table, <n> = 4 for the 40GbE IP core and <n> = 8 for the 100GbE IP core. <l> is log
2
(8*<n>). All interface
signals are clocked by the
clk_txmac
clock.
Signal Name
Direction
Description
l<n>_tx_data[<n>*64-1:0]
Input
TX data. If the preamble pass-through feature is enabled,
data begins with the preamble.
l<n>_tx_empty[<l>-1:0]
Input
Indicates the number of empty bytes on
l<n>_tx_data
when
l<n>_tx_endofpacket
is asserted.
l<n>_tx_startofpacket
Input
When asserted, indicates the start of a packet. The packet
starts on the MSB.
l<n>_tx_endofpacket
Input
When asserted, indicates the end of packet.
UG-01088
2014.12.15
40-100GbE IP Core TX Data Bus with Adapters (Avalon-ST Interface)
3-7
Functional Description
Altera Corporation