Altera 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 50)

The MAC includes the following interfaces:
• Datapath client-interface–The following options are available:
• 40GbE with adapters—Avalon-ST, 256 bits
• 40GbE—Custom streaming, 128 bits
• 100GbE with adapters—Avalon-ST, 512 bits
• 100GbE—Custom streaming, 320 bits
• Datapath PHY side–The following options are available:
• 40GbE—XLAUI
• 100GbE—CAUI, CAUI–4
• Management interface—Avalon-MM host slave interface for MAC management. This interface has a
data width of 32 bits and an address width of 16 bits.
The PHY includes the following interfaces:
• Datapath MAC–The following options are available:
• 40GbE—XLAUI
• 100GbE—CAUI, CAUI–4
• Datapath Ethernet interface–The following options are available:
• 40GbE—Four 10.3125 Gbps serial links
• 40GbE 24.24—Four 6.25 Gbps serial links
• 100GbE—Ten 10.3125 Gbps serial links
• 100GbE CAUI–4—Four 25.78125 Gbps serial links
40-100GbE IP Core TX Datapath
The TX MAC module receives the client payload data with the destination and source addresses and then
adds, appends, or updates various header fields in accordance with the configuration specified. The MAC
does not modify the destination address or the payload received from client. However, the TX MAC
module adds a preamble (if the IP core is not programmed to receive the preamble from user logic), pads
the payload to satisfy the minimum Ethernet frame payload of 46 bytes, and calculates the CRC over the
entire MAC frame. (If padding is added, it is also included in CRC calculation). The TX MAC module can
also modify the source address, and always inserts IDLE bytes to maintain an average IPG.
UG-01088
2014.12.15
40-100GbE IP Core TX Datapath 3-3
Functional Description Altera Corporation
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