Altera 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 7)

• Programmable IPG fine adjustment for Ethernet repeater/bump-in-the-wire applications and traffic
shaping.
• Ethernet flow control using the pause registers or pause interface.
• Programmable maximum receive frame length up to 9600 bytes (jumbo frame) in store-and-forward
mode; there is no frame size limitation for cut-through mode.
• Promiscuous (transparent) and non-promiscuous (filtered) operation modes or received frame address
filtering.
• Configurable received frame filtering with cyclic redundancy check (CRC), runt, or oversized frame
error.
• Optional statistics counters.
• Additional testbench logic to demonstrate Ethernet IP core behavior and customize the interface.
• Statistics real-time output status signals vector.
• Fault signaling: detects and reports local fault and generates remote fault.
The 40-100GbE IP core can support full wire line speed with a 64-byte frame length and back-to-back or
mixed length traffic, up to a programmable frame size greater than 9600 bytes, with no dropped packets.
For a detailed specification of the Ethernet protocol refer to the IEEE 802.3ba-2010 High Speed Ethernet
Standard.
Related Information
IEEE website
The IEEE 802.3ba-2010 High Speed Ethernet Standard is available on the IEEE website.
40-100GbE IP Core Device Family and Speed Grade Support
The following sections list the device family and device speed grade support offered by the 40-100GbE IP
core:
Device Family Support on page 1-4
40-100GbE IP Core Device Speed Grade Support on page 1-5
Device Family Support
Table 1-1: Altera IP Core Device Support Levels
Device Support Level Definition
Preliminary The IP core is verified with preliminary timing
models for this device family. The IP core meets all
functional requirements, but might still be
undergoing timing analysis for the device family. It
can be used in production designs with caution.
1-4 40-100GbE IP Core Device Family and Speed Grade Support
UG-01088
2014.12.15
Altera Corporation About the 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function
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