Toshiba H1 Series - Manual (Page 268)

TMP92CZ26A
92CZ26A-265
3.11.7 An Example of Connections with NAND Flash
Note 1: A reset sets the NDRE and NDWE pins as input ports, so pull-up resistors are needed.
Note 2: The pull-up resistor value for the NDR/B pin must be set appropriately according to the NAND Flash memory to be used and the
capacity of the board (typical: 2 K Ω).
Note 3: The WP (Write Protect) pin of NAND Flash is not supported. When this function is needed, prepare it on an external circuit.
Figure 3.11.10 An Example of Connections with NAND Flash
NDCLE
NDALE
NDRE
NDWE
NDR/B
D[15:0]
CE 0 ND
CE 1 ND
TMP92CZ26A
CLE
ALE
RE
WE
R/B (open drain)
I/O[15:0]
CE WP
NAND Flash 0
CLE
ALE
RE
WE
R/B (open drain)
I/O[7:0]
CE WP
NAND Flash 1
External circuits for Write Protect
2K
Ω
100K Ω