Toshiba H1 Series - Manual (Page 444)

TMP92CZ26A
92CZ26A-441
Figure 3.16.14 Control Flow in UDC (Isochronous transfer type (Receiving))
IDLE
Receive OUT token
Confirm Status
Confirming STATUS register (status)
Confirm DATA PID
• Time out
• Error
Receiving data
• Error
• Receive receiving data
OK
OK
OK
Not receive SOF
Not renew frame number
loss data
Receive SOF nothing
transmitting data
Confirm Token packet
• PID
• Address
• Endpoint
• Transfer
mode
• Error
Invalid
Error
IDLE
Clear X Condition (A)
Error transaction
Set STATUS to RX ERR
Receive SOF
• Frame no read
• Shift BANK
BANK B transaction
• Assert
SOF
• Set data size received preceding frame to
DATASIZE register in BANK A
• Set BANK A bit in DATASET register
• Clear BANK B bit in DATASET register
• Set STATUS to DATAIN
(But if error generate, set RX_ERR)
Shift FIFO BANK
every receive SOF
Error, time out exept data PID
Error, receiving data more than payload.
BANK A transaction
• Assert SOF
• Set data size received preceding frame to
DATASIZE register in BANK B
• Set BANK B bit in DATASET register
• Clear BANK A bit in DATASET register
•
Set STATUS to DATAIN
(But if error generate, set RX_ERR)