Toshiba H1 Series - Manual (Page 614)

TMP92CZ26A
92CZ26A-611
3.23.2.5 High-Priority Conversion Mode
The ADC can perform a high-priority AD conversion while it is performing a normal
AD conversion sequence. A high-priority AD conversion can be started at software by
setting the ADMOD2<HADS> to “1”. It is also triggered by a hardware trigger if so
enabled using ADMOD2<HTSEL1:0>. If a high-priority AD conversion is triggered
during a normal AD conversion, the ADC aborts any ongoing conversion immediately,
and then begins a single high-priority AD conversion for the channel specified with the
ADMOD3<HADC2:0>. Upon the completion of the high-priority AD conversion, the
ADC stores the results of the conversion in the ADREGSPH/L, generates the
high-priority AD conversion interrupt (INTADHP), and then resumes the suspended
normal conversion with that channel. While a high-priority conversion is being
performed, a trigger for another high-priority conversion is ignored.
Example: In the case of a high-priority AD conversion for AN5 (ADMOD3<HADCH2:0>=”101”) is started durring a
normal AD conversion in channel scan repeat mode for AN0 to AN3 (ADMOD1<REPEAT,SCAN>
= “11”
ADMOD1<ADCH2:0>
= “011”)
3.23.2.6 AD Monitor Function
When ADMOD4<CMEN1:0> is set to “1”, the AD monitor function is enabled. This
function generates an interrupt depending on condition of IRQEN1:0, when the
finished AD conversion of the channel which specified with the ADMOD5 register, if
the value of the AD conversion result register pair is greater or less (specified with
CMP1C:0C) than the value of the compare criterion register 0/1(ADCMxREGH/L).
The ADC performs this comparison each times it stores results to the specified AD
conversion result register and generate interrupt (INTADM) when condition is
satisfied. The conversion result register used for the AD monitor function is usually
not read in the program, so mind that its overrun flag <OVRn> and conversion result
store flag <ADRnRF> are always set.
If these are assigned to different channel, 2-analog channel can monitor “less” or
“grater”. And if these are assigned same analog channel, the watch that sets the range
of the voltage is possible.
3.23.2.7 AD Conversion Time
AD conversion of one time is 120 clocks that include sampling clock. The AD
conversion clock can be selected from 1/1 to 1/7 of f
IO
by ADCLK<ADCLK2:0>. To
assure conversion accuracy, the AD conversion clock frequency need to select 12 MHz
and under, i.e., AD conversion time need to select 10 µs and over.
AN0 AN1 AN2 AN5 AN2 AN3 AN0
High-priority AD
conversion start trigger
Conversion channel
Abort conversion
for AN2
Start conversion for AN5
conversion for AN2
again