Toshiba H1 Series - Manual (Page 723)

TMP92CZ26A
92CZ26A-720
(11) NAND-Flash controller (1/4)
Symbol Name Address 7 6 5 4 3 2 1 0
WE ALE CLE CE0 CE1 ECCE BUSY ECCRST
R/W
0 0 0 0 0 0 0 0
08C0H
(Prohibit
RMW)
WE
enable
0: Disable
1: Enable
ALE
control
0: “L” out
1: “H” out
CLE
control
0: “L” out
1: “H” out
0 CE
control
0: “H” out
1: “L” out
1 CE
control
0: “H” out
1: “L” out
ECC
circuit
control
0: Disable
1: Enable
NAND
Flash
state
1: Busy
0: Ready
ECC
reset
control
0: −
1: Reset
*Always
read as
“0”.
SPLW1 SPLW0 SPHW1 SPHW0 RSECCL RSEDN RSESTA RSECGW
R/W W R/W
0 0 0 0 0 0 0 0
NDFMCR0
NANDF
Control0
Register
08C1H
(Prohibit
RMW)
Strobe pulse width
(Low width of NDRE ,
NDWE )
Inserted width
= (f
SYS
) × (set value)
Strobe pulse width
(High width of NDRE ,
NDWE )
Inserted width
= (f
SYS
) × (set value)
Reed-
Solomon
ECC
latch
0: Disable
1: Enable
Reed-
Solomon
operation
0: Encode
(Write)
1: Decode
(Read)
Reed-
Solomon
error
calculation
start
0: −
1: Start
*Always
read as “0”.
Reed-
Solomon
ECC
generator
write
control
0: Disable
1: Enable
INTERDY INTRSC BUSW ECCS SYSCKE
R/W R/W R/W R/W R/W
0 0 0 0 0
08C2H
Ready
interrupt
0: Disable
1: Enable
Reed-
Solomon
calculation
end
interrupt
0: Disable
1: Enable
Data bus
width
0: 8-bit
1: 16-bit
ECC
calculation
0:Hamming
1: Reed-
Solomon
Clock
control
0: Disable
1: Enable
STATE3 STATE2 STATE1 STATE0 SEER1 SEER0
R
0 0 0 0 Undefined Undefined
NDFMCR1
NANDF
Control1
Register
08C3H
Status read (See the table below.)
ECCD7 ECCD6 ECCD5 ECCD4 ECCD3 ECCD2 ECCD1 ECCD0
R
0 0 0 0 0 0 0 0
08C4H
NAND Flash ECC Register (7-0) (7-0)
ECCD15 ECCD14 ECCD13 ECCD12 ECCD11 ECCD10 ECCD9 ECCD8
R
0 0 0 0 0 0 0 0
NDECCRD0
NANDF
Code ECC
Register0
08C5H
NAND Flash ECC Register (7-0) (15-8)
ECCD7 ECCD6 ECCD5 ECCD4 ECCD3 ECCD2 ECCD1 ECCD0
R
0 0 0 0 0 0 0 0
08C6H
NAND Flash ECC Register (7-0) (7-0)
ECCD15 ECCD14 ECCD13 ECCD12 ECCD11 ECCD10 ECCD9 ECCD8
R
0 0 0 0 0 0 0 0
NDECCRD1
NANDF
Code ECC
Register1
08C7H
NAND Flash ECC Register (7-0) (15-8)