Toshiba H1 Series - Manual (Page 272)

TMP92CZ26A
92CZ26A-269
Figure 3.12.3 TMRA45 Block Diagram
φT1
φT16
φT256
8-bit comparato
r
(CP5)
8-bit comparato
r
(CP4)
8-bit up counter
(UC4)
2
n
Ov
er
flow
8-bit
up comparato
r
(UC5)
Ti
mer
flip-
flop
TA5FF
Match detect
Match detect
8-bit timer
register
TA5REG
φT1 φT4
φT16
512
256
128
64
32
16
8
4
2
φT1
φT4
φT16
φT256
Run/clea
r
Pr
escale
r
TA45MOD <TA4CLK1:0>
Pr
escale
r
clock
φT0
TMR
TA45RUN<
TA4
RUN>
Selecto
r
8-bit timer regist
er
TA4REG
TA45MOD <PWM41:40>
TA45MOD <TA45M1:0>
TMRA4 Interrup
t output:
INTTA4
TMRA4 Interrup
t output:
TA4TR
G
TA45MOD <TA5CLK1:0>
TA45RUN<
TA5
RUN>
TA5FF
CR
Ti
mer fl
ip
-fl
op
output: TA5
O
UT
TMRA5 Interrup
t output:
INTTA5
Internal data bus
TA45RUN <TA4RDE>
TA45RUN <TA45PRUN>
Selecto
r
Internal data bus
T
A
4T
R
G
Register buffer 4
Low- frequency clock (
fs)