Toshiba H1 Series - Manual (Page 45)

TMP92CZ26A
92CZ26A-42
Table 3.3.8 Output buffer state table (2/2)
Output Buffer State
In HALT mode (IDLE2/1/STOP)
When the CPU is operating
<PxDR>=1 <PxDR>=0
Port Name
Output Function
Name
During Reset When Used
as function
Pin
When Used
as Output
port
When Used
as function
Pin
When Used
as Output
port
When Used
as function
Pin
When Used
as Output
port
PM1 MLDALM,TA1OUT
PM2 MLDALM , ALARM
PM7 PWE
ON
PN0-PN7 KO0-KO7
PP1 TA3OUT
PP2 TA5OUT
PP3 TA7OUT
ON ON OFF
PP4-PP5 −
OFF
− − −
PP6 TB0OUT0
PP7 TB1OUT0
ON ON ON OFF
PR0
− − − −
PR1 SPDO
PR2 SPCS
PR3 SPCLK
PT0-PT7 LD8-LD15
PU0-PU6 LD16-LD22
LD23
OFF
PU7
EO_TRGOUT ON
PV0 SCLK0
ON ON
OFF
PV1 −
PV2 −
OFF
PV3-PV4 − ON
− − −
PV6 SDA
PV7 SCL
ON ON OFF
PW0-PW7 −
OFF
− − −
PX4 CLKOUT, LDIV ON ON ON OFF
PX5 −
PX7 −
PZ0-PZ5 −
− − −
PZ6-PZ7
EO_MCUDATA,
EO_MCUREQ
OFF
ON
ON
ON
ON
ON
OFF
D+, D-
−
OFF ON/OF depend on USBC operation
X2
−
IDLE2/1:ON,
STOP: output ”H”
XT2 −
Always ON
IDLE2/1:ON,
STOP: output ”HZ”
ON: The buffer is always turned on. When the bus is released,
however, output buffers for some pins are turned off.
OFF: The buffer is always turned off.
- : No applicable
*1: Port having a pull-up/pull-down resistor.