Toshiba H1 Series - Manual (Page 8)

TMP92CZ26A
92CZ26A-5
Figure 1.1 Block Diagram of TMP92CZ26A
(PY)P97
IX
IY
IZ
SP
L H
E D
C B
A W
XSP
XIZ
XIY
XIX
XHL
XDE
XBC
XWA
900/H1 CPU
F SR
32bit
P C
288KB RAM
SERIAL I/O
SIO0
(RXD0)P91
(TXD0)P90
(CTS0, SCLK0)P92
RESET
DBGE
AM [1:0]
10-bit 6ch
AD
Converter
VREFH, VREFL
AVCC, AVSS
(AN3, MY, ADTRG )PG3
(AN2, MX)PG2
(AN0 to AN1)PG0 to PG1
8BIT TIMER
(TMRA0)
8BIT TIMER
(TMRA1)
(TA1OUT, MLDALM)PM1
8BIT TIMER
(TMRA2)
8BIT TIMER
(TMRA3)
(TA3OUT)PP1
16BIT TIMER
(TMRB0)
WATCH-DOG TIMER
X1
H-OSC
X2
Clock gear
Interrupt
Controller
MMU
(TB0OUT0)PP6
XT1
L-OSC
XT2
(PX, INT4)P96
Touch Screen
I/F
(TSI)
LCD
Controller
(LCP0)PK0
(LLOAD)PK1
(LFR)PK2
(LVSYNC)PK3
(SDA)PV6
(SCL)PV7
SDRAM
Controller
(SDCLK)PF7
( SDRAS , SRLLB )PJ0
( SDCAS , SRLUB )PJ1
( SDWE , SRWR )PJ2
(SDLLDQM)PJ3
(SDLUDQM)PJ4
(SDCKE)PJ7
PORT8
P80 ( 0 CS )
P81 ( 1 CS , SDCS )
P82 ( 2 CS , CSZA , SDCS )
P83 ( 3 CS , CSXA )
P84 ( CSZB )
P85 ( CSZC )
PORT1
PORT6
D0 to D7
P10 to P17 (D8 to D15)
PORT7
P70 ( RD )
P73 (EA24)
P74 (EA25)
P75(R/
W , NDR/ B )
P76 ( WAIT )
RTC
MELODY/
ALARM-OUT
KEY-BOARD
I/F
PA0 to PA7 (KI0 to KI7)
PN0 to PN7 (KO0 to KO7)
PC7 (KO8)
PM2 ( ALARM , MLDALM )
I
2
S
(I 2 S0)
PLL
NAND-FLASH
I/F (2ch)
(I2S0DO)PF1
(I2S0CKO)PF0
PC4 (EA26)
PC5 (EA27)
PC6 (EA28)
SBI (I 2 Cbus)
(I2S0WS)PF2
SPI
Controller
(SPDO)PR1
(SPDI)PR0
(SPCLK)PR3
( SPCS ) PR2
(AN4 to AN5)PG4 to PG5
I
2
S
(I 2 S1)
(I2S1DO)PF4
(I2S1CKO)PF3
(I2S1WS)PF5
(TA0IN, INT1)PC1
(TA2IN, INT3)PC3
8BIT TIMER
(TMRA4)
8BIT TIMER
(TMRA5)
(TA5OUT)PP2
8BIT TIMER
(TMRA6)
8BIT TIMER
(TMRA7)
(TA7OUT, INT5)PP3
(TB0IN0, INT6)PP4
16BIT TIMER
(TMRB1)
(TB1OUT0)PP7
(TB1IN0, INT7)PP5
D+
D -
USB
Controller (X1USB) PX5
(LHSYNC)PK4
(LGOE2 to 0)PK7 to 5
(LD7 to 0)PL7 to 0
(LD15 to 8)PT7 to 0
(LD22 to 16)PU6 to 0
PC0 (INT0)
PC2 (INT2)
P71 ( WRLL , NDRE )
P72 ( WRLU , NDWE )
P86 ( CSZD , CE 0 ND )
P87 ( CSXB , CE 1 ND )
PJ5 (NDALE)
PJ6 (NDCLE)
PX7
(CLKOUT, LDIV)PX4
PV0 (SCLK0)
PV1
PV2
PW7 to 0
DSU
PZ0 (EI_PODDATA)
PZ1 (EI_SYNCLK)
PZ2 (EI_PODREQ)
PZ3(EI_REFCLK)
PZ4(EI_TRGIN)
PZ5(EI_COMRESET)
PZ6(EO_MCUDATA)
PZ7(EO_MCUREQ)
PMC PM7 (PWE)
DVCC3A [12]
DVCC3B [1]
DVCC1A [5]
DVCC1B [1]
DVSSCOM
DVCC1C [1]
DVSS1C [1]
BOOT ROM 8KB
MAC
DMAC
PORT5
PORT4
P60 to P67 (A16 to A23)
P50 to P57 (A8 to A15)
P40 to P47 (A0 to A7)
( LD23, EO_TRGOUT )PU7
PORTV
PV3
PV4