Toshiba H1 Series - Manual (Page 361)

TMP92CZ26A
92CZ26A-358
b. Slave Mode
z
In the Slave Mode, the start condition and the slave address are received.
After the start condition is received from the master device, while eight clocks are
output from the SCL pin, the slave address and the direction bit that are output
from the master device are received.
When a GENERAL CALL or the same address as the slave address set in I2CAR
is received, the SDA line is pulled down to the Low-level at the 9th clock, and the
acknowledge signal is output.
An INTSBI interrupt request occurs on the falling edge of the 9th clock. The
<PIN> is cleared to “0”. In Slave Mode the SCL line is pulled down to the
Low-level while the <PIN> = “0”.
Figure 3.15.14 Start condition generation and slave address transfer
1 2 3 4 5 6 7 8 9
A6 A5 A4 A3 A2 A1 ACK R/ W
Slave address + Direction bit
Acknowledge
signal from a
slave device
Start condition
SCL pin
SDA pin
<PIN>
INTSBI
interrupt request
Output of master
Output of slave
A0