Toshiba H1 Series - Manual (Page 77)

TMP92CZ26A
92CZ26A-74
(2) Soft start function
The TMP92CZ26A can initiate micro DMA/HDMA either with an interrupt or by
using the micro DMA /HDMA soft start function, in which micro DMA or HDMA is
initiated by a Write cycle which writes to the register DMAR.
Writing “1” to each bit of DMAR register causes micro DMA or HDMA to be
performed once. On completion of the transfer, the bits of DMAR for the completed
channel are automatically cleared to “0”.
When writing again “1” to it, soft start can execute continuously until the DMA
transfer counter (DMACn) or HDMA transfer counter B (HDMACBn) become “0”.
When a burst is specified by the register DMAB, data is transferred continuously
from the initiation of micro DMA until the value in the micro DMA transfer counter is
“0”.
Note1: If it is started by software, don’t set any channels to start in same time.
Note2: If be started sequentially, restart it after confirming micro DMA of all channels is completed
(all micro DMA are set to “0”).
Symbol NAME Address 7 6 5 4 3 2 1 0
DREQ7 DREQ6 DREQ5 DREQ4 DREQ3 DREQ2 DREQ1 DREQ0
R/W
0 0 0 0 0 0 0 0
DMAR
DMA
Request
109H
(Prohibit
RMW)
1: Start DMA
(3) Transfer control registers
The transfer source address and the transfer destination address are set in the following
registers. An instruction of the form LDC cr,r can be used to set these registers.
Channel 0
DMAS0 Micro DMA source address register 0
DMAD0 Micro DMA destination address register 0
DMAC0 Micro DMA counter register 0
DMAM0 Micro DMA mode register 0
Channel 7
DMAS7 Micro DMA source address register 7
DMAD7 Micro DMA destination address register 7
DMAC7 Micro DMA counter register 7
DMAM7 Micro DMA mode register 7
8 bits
16 bits
32 bits