Altera Quartus II Settings File - Manual (Page 171)

SYNCHRONIZATION_REGISTER_CHAIN_LENGTH
This setting specifies the maximum number of registers in a row to be considered as a synchronization
chain. Synchronization chains are sequences of registers with the same clock, no fanout in between, such
that the first register is fed by a pin, or by logic in another clock domain. These registers will be considered
for metastability analysis (available for some families), and are also protected from optimizations such as
retiming. When gate-level retiming is turned on, these registers will not be moved. The default length is
set to two.
Old Name
ADV_NETLIST_OPT_METASTABLE_REGS
Type
Integer
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment is included in the Analysis & Synthesis report.
This assignment supports synthesis wildcards.
Syntax
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH <value>
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH -entity
<entity name> <value>
set_instance_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH -to
<to> -entity <entity name> <value>
MNL-Q21005
2015.05.04
SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 171
Quartus Settings File Reference Manual Altera Corporation
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