Rtlv_simplified_logic – Altera Quartus II Settings File User Manual
Page 950
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RTLV_SIMPLIFIED_LOGIC
Allow RTL Viewer to remove wire nodes and merge chain of equivalent combinatorial gates
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Syntax
set_global_assignment -name RTLV_SIMPLIFIED_LOGIC <value>
Default Value
On
950
RTLV_SIMPLIFIED_LOGIC
MNL-Q21005
2015.05.04
Altera Corporation
Quartus Settings File Reference Manual
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