Altera Quartus II Settings File - Manual (Page 447)

AUTO_MERGE_PLLS
Allows the Compiler to automatically find and merge together two compatible phase-locked loops (PLL)
driven by the same clock source, reducing the total number of PLLs used in a design.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
This assignment is included in the Fitter report.
Syntax
set_global_assignment -name AUTO_MERGE_PLLS <value>
set_global_assignment -name AUTO_MERGE_PLLS -entity <entity name> <value>
set_instance_assignment -name AUTO_MERGE_PLLS -to <to> -entity <entity
name> <value>
Default Value
On
MNL-Q21005
2015.05.04
AUTO_MERGE_PLLS 447
Quartus Settings File Reference Manual Altera Corporation
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