Altera Quartus II Settings File - Manual (Page 282)

ACLK_RULE_NO_SZER_ACLK_DOMAIN
Direct Design Assistant to detect synchronizer between asynchronous clock domains on the design.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN <value>
282 ACLK_RULE_NO_SZER_ACLK_DOMAIN
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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