Classic timing assignments, Analyze_latches_as_synchronous_elements – Altera Quartus II Settings File User Manual

Page 253

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Classic Timing Assignments

ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS

Directs the Timing Analyzer to analyze latches as synchronous elements, rather than as combinational

elements. Although latches continue to be implemented as a LUT feeding back onto itself, turning on this

option directs the Timing Analyzer to analyze all latches as synchronous elements. Specifically, the clock

enable is analyzed as an inverted clock. The Timing Analyzer reports the results of setup and hold analysis

on these latches

Type

Boolean

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

None

Syntax

set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS <value>

Default Value

On

MNL-Q21005

2015.05.04

Classic Timing Assignments

253

Quartus Settings File Reference Manual

Altera Corporation

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