Altera Quartus II Settings File - Manual (Page 62)

CLKLOCKX1_INPUT_FREQ
Creates an internal ClockLock phase-locked loop (PLL) and specifies its frequency. Turning this option
on is equivalent to instantiating an altclklock megafunction with either of its ClockBoost parameters set to
a value of 1. The CLKLOCKx1 Input Frequency option is provided primarily for backward compatibility
with MAX+PLUS II designs. Altera recommends using the MegaWizard Plug-In Manager to instantiate
PLLs in new designs. This option is ignored if it is assigned to anything other than an input pin or to a
device that does not have the PLL feature.
Type
Frequency
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_instance_assignment -name CLKLOCKX1_INPUT_FREQ -to <to> -entity <entity
name> <value>
62 CLKLOCKX1_INPUT_FREQ
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
Send Feedback