Enable_ip_debug – Altera Quartus II Settings File User Manual
Page 87
ENABLE_IP_DEBUG
Make certain nodes (for example, important registers, pins, and state machines) visible for all the
MegaCore functions in a design. You can use a MegaCore function's nodes to effectively debug the
megafunction, particularly when using the megafunction with the SignalTap II Logic Analyzer. The Node
Finder, using SignalTap II Logic Analyzer filters, displays all the nodes that Analysis & Synthesis makes
visible. When making the debugging nodes visible, Analysis & Synthesis can change the fmax and number
of logic cells in MegaCore functions.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment is included in the Analysis & Synthesis report.
Syntax
set_global_assignment -name ENABLE_IP_DEBUG <value>
Default Value
Off
MNL-Q21005
2015.05.04
ENABLE_IP_DEBUG
87
Quartus Settings File Reference Manual
Altera Corporation