Eda_simulation_vcd_output_signals_to_tcl_file – Altera Quartus II Settings File User Manual
Page 381
EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE
Specifies which type of output signals should be written out to the TCL file which can be used in a third-
party EDA simulation tool to generate a VCD file. Writing out all output signals to the TCL file may result
in a very large VCD file being generated by the third-party simulation tool.
Type
Enumeration
Values
• All
• All Except Combinational Logic Element Outputs
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE -
section_id <section identifier> <value>
Default Value
All Except Combinational Logic Element Outputs, requires section identifier
MNL-Q21005
2015.05.04
EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE
381
Quartus Settings File Reference Manual
Altera Corporation