Apex20k_decrease_input_delay_to_internal_cells – Altera Quartus II Settings File User Manual
Page 434
APEX20K_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS
Decreases the propagation delay from an input or bidirectional pin to logic and embedded cells within the
device. This is an advanced option that should be used only after you have compiled a project, checked the
I/O timing, and determined that the timing is unsatisfactory. For detailed information on how to use this
option, refer to the data sheet for the device family. This option is ignored if it is applied to anything other
than an input or bidirectional pin.
Old Name
DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS, Decrease Input Delay to Internal Cells -- APEX
20K/APEX 20KE/APEX 20KC/APEX II/ARM-based Excalibur
Type
Enumeration
Values
• Large
• Medium
• Off
• On
• Small
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_instance_assignment -name
APEX20K_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS -to <to> -entity <entity name>
<value>
434
APEX20K_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS
MNL-Q21005
2015.05.04
Altera Corporation
Quartus Settings File Reference Manual