Altera Quartus II Settings File - Manual (Page 678)

PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA
Specifies that the Fitter should perform physical synthesis optimizations on logic and registers, specifically
allowing the mapping of logic and registers into unused memory blocks during fitting to achieve a fit.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
This assignment is included in the Fitter report.
This assignment supports synthesis wildcards.
Syntax
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA
<value>
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA
-entity <entity name> <value>
set_instance_assignment -name
PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA -to <to> -entity <entity name>
<value>
Default Value
Off
678 PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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