Altera Quartus II Settings File - Manual (Page 654)

OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING
Controls whether the fitter optimizes I/O pin timing by automatically packing registers into I/Os to
minimize I/O -> register and register -> I/O delays. When the 'Normal' option is enabled, the Fitter will
opportunistically pack registers into I/Os that should improve I/O timing. When 'Pack All I/O Registers' is
enabled, the fitter will aggressively try to pack any registers connected to input, output or output enable
pins into I/Os unless prevented by user constraints or other legality restrictions. By default, this option is
set to 'Normal'. This option requires the Optimize Timing option to be enabled for it to work.
Type
Enumeration
Values
• Normal
• Off
• Pack All IO Registers
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment is included in the Fitter report.
Syntax
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING
<value>
Default Value
Normal
654 OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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