Altera Quartus II Settings File - Manual (Page 365)

EDA_MAP_ILLEGAL_CHARACTERS
Maps the vertical bar (|), tilde (~), and colon (:) characters in Quartus II hierarchical node names to the
legal Verilog HDL characters z, x, and underscore (_), respectively, in Verilog Output Files. Turning on
this option also maps other illegal non-alphanumeric characters, including brackets [], parentheses, (),
angle brackets <>, and braces {} to underscores (_).
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment is included in the Fitter report.
Syntax
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS -section_id <section
identifier> <value>
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS -entity <entity
name> -section_id <section identifier> <value>
Default Value
Off, requires section identifier
MNL-Q21005
2015.05.04
EDA_MAP_ILLEGAL_CHARACTERS 365
Quartus Settings File Reference Manual Altera Corporation
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