Altera Quartus II Settings File - Manual (Page 605)

INCREASE_INPUT_DELAY_TO_CE_IO_REGISTER
Increases the propagation delay from the interior of the device to the clock enable input of an I/O register.
This is an advanced option that should be used only after you have compiled a project, checked the I/O
timing, and determined that the timing is unsatisfactory. For detailed information on how to use this
option, refer to the data sheet for the device family. This option is ignored if it is applied to anything other
than an I/O cell that has a register that has a clock enable signal.
Type
Enumeration
Values
• Large
• Off
• On
• Small
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_instance_assignment -name INCREASE_INPUT_DELAY_TO_CE_IO_REGISTER -to
<to> -entity <entity name> <value>
MNL-Q21005
2015.05.04
INCREASE_INPUT_DELAY_TO_CE_IO_REGISTER 605
Quartus Settings File Reference Manual Altera Corporation
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