Altera Quartus II Settings File - Manual (Page 604)

INCREASE_INPUT_CLOCK_ENABLE_DELAY
Increases the propagation delay from the interior of the device to the clock enable input of an output
register. This is an advanced option that should be used only after you compile a project, check the I/O
timing, and determine that the timing is unsatisfactory. This option is ignored if it is applied to anything
other than an I/O cell that has an input register with a clock enable signal. For detailed information on
how to use this option, refer to the data sheet for the device family, which is available from the Literature
section of the Altera web site.
Type
Enumeration
Values
• Large
• Off
• On
• Small
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
Syntax
set_instance_assignment -name INCREASE_INPUT_CLOCK_ENABLE_DELAY -to <to> -
entity <entity name> <value>
604 INCREASE_INPUT_CLOCK_ENABLE_DELAY
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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