Clk_rule_gated_clk_fanout – Altera Quartus II Settings File User Manual
Page 288
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CLK_RULE_GATED_CLK_FANOUT
Direct Design Assistant to check gated clock have feed to certain number of clock port to effectively save
power.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_global_assignment -name CLK_RULE_GATED_CLK_FANOUT <value>
288
CLK_RULE_GATED_CLK_FANOUT
MNL-Q21005
2015.05.04
Altera Corporation
Quartus Settings File Reference Manual
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