Stratix_decrease_input_delay_to_internal_cells – Altera Quartus II Settings File User Manual

Page 761

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STRATIX_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS

Decreases the propagation delay from an input or bidirectional pin to logic and embedded cells within the

device. This is an advanced option that should be used only after you have compiled a project, checked the

I/O timing, and determined that the timing is unsatisfactory. For detailed information on how to use this

option, refer to the data sheet for the device family. This option is ignored if it is applied to anything other

than an input or bidirectional pin.

Old Name

Decrease Input Delay to Internal Cells -- Stratix/Stratix GX/Cyclone,

YEAGER_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS

Type

Enumeration

Values

• Large

• Medium

• Off

• On

• Small

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

This assignment supports Fitter wildcards.

Syntax

set_instance_assignment -name
STRATIX_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS -to <to> -entity <entity name>
<value>
set_instance_assignment -name
STRATIX_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS -from <from> -to <to> -entity
<entity name> <value>

MNL-Q21005

2015.05.04

STRATIX_DECREASE_INPUT_DELAY_TO_INTERNAL_CELLS

761

Quartus Settings File Reference Manual

Altera Corporation

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