Altera Quartus II Settings File - Manual (Page 492)

DDIO_INPUT_REGISTER
Directs the Compiler to perform special placement and routing of the specified register to prevent register
packing of the input registers into the IO registers. This is used for registers involved in DDR memory
interfaces. A setting of High designates the input register that gets set on the rising edge of the clock; a
setting of Low designates the input register that gets set on the falling edge of the clock.
Type
Enumeration
Values
• High
• Low
• Off
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
Syntax
set_instance_assignment -name DDIO_INPUT_REGISTER -to <to> -entity <entity
name> <value>
492 DDIO_INPUT_REGISTER
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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